PALADUGU, Phani Suresh. HBM4 Integration In AI/HPC Chiplet Architectures: Co-Design And Telemetry-Driven Optimization. Journal of International Crisis and Risk Communication Research , [S. l.], p. 308–323, 2026. Disponível em: https://jicrcr.com/index.php/jicrcr/article/view/3701. Acesso em: 26 feb. 2026.