1.
Paladugu PS. HBM4 Integration In AI/HPC Chiplet Architectures: Co-Design And Telemetry-Driven Optimization. JICRCR [Internet]. 2026 Feb. 10 [cited 2026 Jun. 25];:308-23. Available from: http://jicrcr.com/index.php/jicrcr/article/view/3701